High End FinFet ASIC Market To Approach $20 Billion
Total Available Market Doubled Over Eight Years
Taipei, Taiwan June 15, 2021 – The global high end ASIC market will reach nearly $20 billion in five years, driven by high-performance computing applications in data processing and telecommunications, according to James Huang, Vice President, Alchip Technologies.
Alchip is traded on the Taiwan stock exchange and its Global Repository Receipts are traded on the Luxembourg Exchange. Headquartered in Taipei, the company has operations in North America, Europe, Japan, and China.
In a presentation to industry executives, Mr. Huang pegged 2026 ASIC sales at $20 billion, up from what most analysts are pegging as a $10 billion market this year and reflecting the high-end of an anticipated 12% to 15% Compound Annual Growth Rate (CAGR).
Devices headed into networking applications will account for 45% of this year’s total market, while storage applications account for 35% and compute acceleration applications will account for the remaining 20 % of total, or $10 billion total available market (TAM). Mr. Huang estimates that North America represents the largest geographic market, while the pan-Asian region could experience the largest growth.
Drilling into technology specifics, advances in heterogeneous packaging technology will be foundational to meeting revenue expectations. Current 2.5D and emerging 3D packaging technology that bundles multiple “chiplets” that perform different function would lead the charge. We expect to see 2.5D packaging proliferating in the next 2-3 years. From 2023-2024, we could see true 3D stacking (die stacking, wafer stacking etc.) coming through. Mr. Huang reported that, according to Mordor Intelligence, 2.5D/3D ASICs will grow at an astounding 35.3% CAGR between 2020 and 2025.
“The ‘next-gen’ device that will lead industry growth will little resemble the current market leaders. They’ll be built on advanced processing technologies, at or below 3nm. Rather than a single IC, they will be integrated multi-chiplet devices in advanced 2.5D/3D CoWoS or InFO packages. They will be high-power and high-frequency running at more than 400 Watts.,” Mr. Huang predicted.
Not for the Faint of Heart
The exponential leap in market size and functionality will require design capabilities significantly more robust than what is required today. Devices with billions of logic gates will require design resource investments that will be increase three-to-four times, depending on complexity.
“The ASIC company of tomorrow will be a very advanced technology organization. It will require a robust design methodology, flexible business model, best-in-class IP portfolio and advanced packaging technology expertise. This, as a matter, of fact is the model upon which Alchip is being built today,” Johnny Shen, President and CEO of Alchip explained.