| With the migration to
advanced technology nodes, designers are faced with the
daunting task of implementing smaller chips with ever-greater
complexity that operate at higher frequencies. The escalating
deep sub-micron issues further drag down the industry's
average of first silicon success rate. Consequently, EDA
tools are no longer sufficient to tackle deep sub-micron
issues, causing silicon re-spins that could result in
the missing of an entire product generation.
Leading the pack in the SoC arena, Alchip has developed
a time proven design methodology that addresses the
complex issues in advanced processes. We delivered first
silicon success at 90nm in 2004, and, in the following
year, successfully implemented numerous 90nm designs,
one of which contains 60M logic gates and operates at
500MHz whole-chip. Our correct-by-construction methodology
allows us to approach the most complex nanometer designs
and ensure consistent first silicon success. Furthermore,
our unique approach and in-depth understanding of design
fundamentals address the needs for lower power, smaller
area, better yield, and higher performance.
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