CEO Interview: Johnny Shen of Alchip

By Daniel Nenni on 06/10/2020

Alchip was founded in 2003 by a group of Silicon Valley veterans that followed a similar path of working for semiconductor companies then moving to the EDA/IP/ASIC ecosystem. In fact, I used to play basketball with the Alchip co-founder/chairman during that time and can tell you he is a fierce competitor. Good thing too because the ASIC business is fiercely competitive, absolutely.

I saw in the news that Alchip is moving into the North America ASIC Market. Why now?
Coming to North America has always been part of our long-range plan. We started when we began putting assets in place beginning last November. There is huge demand in North America for the High-Performance ASICs that are our core competency. We didn’t so much make the decision to come as we have been asked by a number of large hyperscalers, OEMs, and fabless device companies, both established and start-ups, to make our services more locally available. We’ve opened an office in Milpitas headed by Hiroyuki Nagashima, who formerly ran our business in Japan, and have staffed both design services and business management capabilities.

I know Alchip has a huge presence in Europe and Asia Pacific region, but you’re probably not a familiar name to many in the US. Can you tell a bit about the company?
We were founded in 2003 and all of executive management have Silicon Valley roots and are alumnae of top-tier North American engineering and business schools. As important as our pedigree is the fact that we registered record revenue for the second quarter of this year and anticipate record revenue for 2020, despite the current business environment. But more germane to the question: We became a publicly traded company in 2014. Some our more important technology milestones include completing 16nm and 12nm AI and automotive devices over the past 2-years and we will soon announce the successful tape-oust of sub-10nm designs.

ASICs are a huge industry. Is there any particular area you’re focusing on and why?
As I mentioned earlier, we are a high-performance computing ASIC company. A lot of ASIC companies try to be everything to everybody. But our legacy has always been to work on the leading-edge, hand-in-glove with our foundry partner, TSMC. Right now, for instance, we have one 7nm design in production and multiple 7nm tape-outs underway. This is the legacy that makes us attractive to hyperscalers and start-ups alike for high performance applications including artificial intelligence for cloud inference and training.

You talked a great deal about high performance computing, what are some of the specific attributes you bring to the challenges?
The ASIC business is complex from a both a business model and technical model perspective. We like to think that we put the “s” in Specific with a Flexible Business Model that has five different entry points and three different exit points. We have developed a design methodology for large, high power ICs, best-in-class 3rd Party IP, and advanced 2.5D package technology.

From both a business model and technology perspective it’s important to point out that we have developed a best-in-class IP portfolio to lower design risk and shrink time-to-volume. This allow us to focus on what we do best, then differentiate ourselves by working with others, then leveraging what they do best into a world-class ASIC flow.

Across the board, our technology optimizes our design flows and methodologies to maximize our client’s time-to-design and time-to-market with maximum yield results.

OK, but it’s all about proof. Can you tell us about some of the other work you’ve done in other parts of the world?
Interestingly, North America is the beneficiary of world-class thinking. We have helped our clients go-to-market with industry-leading high-performance chips for supercomputing and server applications. To date, we’ve totaled had more than 400 advanced technology tape outs. That’s more than 20 advanced technology a year. That’s a number that I think any other company will have a hard time matching.

Can you give me a bit more detail as to what differentiates your design flow and methodologies?
Alchip’s design platform provides a unique clocking methodology that improves overall clock network capacitance and power; minimizes clock skew and insertion delay; and maximizes routing resource. Most importantly, it minimize on-chip variation to deliver significantly better yields at advanced nodes. Our design platform also offers a knowledge-based design flow for different applications in a manageable QoR range at each design steps to achieve superior power, performance and area witin a controllable design cycle for large scale designs. This translates into faster time-to-market and ensure one-pass silicon success.

Some ASIC companies decided to develop their own IP and yet you have turned to leading 3rd party IP partners. Why?
Building an HPC is complex and requires very specialized IP. Complexity requires collaboration and I think strategically, we recognize that no one company can cost-effectively be all things to all people. If it is commercially available IP, we want to collaborate, not compete with our best-in-class IP partners. However want to compete with our partners, but an IP block is not available, we won’t let that be a roadblock to success. So we focus on the specialized IP that they our IP partners don’t have. That’s why for instance, we provide proprietary macros such as D2D IP for PFN (12nm) APLinkl1.0.

Why is advanced packaging so important to high performance computing applications. What services do you offer?
Packaging is the new ‘Moore’s Law’ for high-performance computing challenges. Understanding and applying the technology is critical to meeting the demand for more functionality and greater performance in a smaller physical footprint.

We just rolled out a CoWoS program. This is new for us and new for the industry; it requires a significant investment our our part. But that investment is important to ease our customer’s long range roadmap concerns. CoWoS is critical to f today’s HPC ASICs because it incorporates multiple side-by-side die on a silicon interposer. The CoWoS service rolled out today covers multiple package designs. Looking further down the road we’re also working with customers and making investments in INFO technology. Yes, this requires a huge investment on our part. But it says to the marketing, we’re committed and ready.

COVID-19 really turned the world economy on its ear. How is Alchip fairing?
As I said earlier, we recorded a record first quarter have forecast a positive outlook for the remainder of the year. Our work force was minimally impacted and we are looking for a record second quarter and will be working on multiple 7nm tape-outs.

The impact on COVID-19 has been insignificant on our existing business. We are working at full capacity and people can work from home or the office. The associated travel ban may eventually slow business development. But we have repeat business from existing customers that has kept our pipeline full. For us, 2020 will be a record year. The current situation actually favors the outlook for high-performance computing because of the growing importance and emphasis on cloud computing and that’s our sweet spot.

Congratulations. But what does the rest of the year look like?
The HPC market remains a major revenue contributor in terms of both production shipment. Project NREs will also account for a considerable part of the company’s total revenue. We are seeing that 7nm HPC shipments will be a critical factor to growth in the second half of the year. At the same time, we are seeing only non-significant impact from Covid-19.

Looking forward, and in that same vain, what is the outlook for the High-Performance Computing Market, specifically, the High-Performance Computing Market in North America?
According to MarketsAndMarkets, the global High-performance Computing (HPC) Market was valued at $35.8 billion in 2019 and is expected to reach a value of $50.32 billion by 2025, at a CAGR of 7.02%. Growing adoption of HPC solutions and services across diverse industries such as datacenters, finanicial institutions, autonomous vehicles, and 5G infrastructure, is the major growth driver. Geographically, North America became the largest HPC market last year and is expected to hold that position through 2025. With Alchip’s track record for high-performance ASICs in cloud service appliations in other geographical areas, we are very well positioned to serve North America HPC customers with proven design solutions manufactured on TSMC leading edge technologies.

About Alchip

Alchip Technologies Ltd., headquartered in Taipei, Taiwan, is a leading global provider of silicon design and production services for system companies developing complex and high-volume ASICs and SoCs. The company was founded by semiconductor veterans from Silicon Valley and Japan in 2003 and provides faster time-to-market and cost-effective solutions for SoC design at mainstream and advanced, including 7nm processes. Customers include global leaders in AI, HPC/supercomputer, mobile phones, entertainment device, networking equipment and other electronic product categories. Alchip is listed on the Taiwan Stock Exchange (TWSE: 3661) and is a TSMC-certified Value Chain Aggregator.

For more information, please visit our website: